High voltage on a PCB demands physical distance: traces at different potentials must be spaced far enough apart that the voltage cannot arc across the gap, in air or along the board surface. Net classes in the PCB software let you assign spacing rules by voltage, so the design rule checker enforces the clearance automatically. Setting those rules correctly is electrical safety expressed as layout discipline.
Why Spacing Scales With Voltage
Air breaks down at a finite electric field strength, roughly 3 kilovolts per millimeter under ideal conditions, but real boards are far from ideal: humidity, dust, contamination, and sharp trace corners all lower the breakdown threshold. Along the board surface, the phenomenon is creepage, and it fails at even lower voltages than air gaps, especially when the surface is contaminated. Safety standards therefore specify minimum clearances (through air) and creepage distances (along surfaces) as functions of voltage, with margins for pollution and overvoltage transients. A high voltage trace routed at logic-level spacing is a latent arc waiting for the right humidity; the spacing rules exist because the failure mode is fire or shock, not just a malfunction.
Setting Up Net Classes
In the PCB editor, create net classes for each voltage domain: logic, low voltage power, mains, high voltage secondary, and so on. Assign each net to its class, then define the clearance rules between classes: the clearance between a high voltage net and any other net must meet the requirement for the highest voltage involved. Set the design rule checker to enforce these clearances, and run it often during layout, not just at the end; catching a violation early is a small reroute, while catching it at the end is a board spin. Name the classes clearly and document the voltage each represents; the next person to edit the board needs to know why a trace cannot move closer.
Choosing the Spacing Values
Base the spacing on the applicable safety standard for the product's market and application; the standard's tables give clearance and creepage per voltage, adjusted for pollution degree and overvoltage category. As rough shop guidance, many designers use about 1 millimeter per kilovolt as a starting point for clearance in clean indoor environments, increasing it for creepage and for harsher conditions, but this is a rule of thumb, not a certification. Always check the actual standard for production work. Remember that the peak voltage matters, not the RMS or DC average; a switching node with high-voltage transients needs spacing for the transient peak. And account for manufacturing tolerances: the fab's etching tolerance eats into your drawn clearance, so add margin.
Layout Techniques for High Voltage
Spacing rules are enforced by the checker, but good layout makes compliance natural. Keep high voltage sections physically grouped and separated from low voltage sections; a moat of empty board between domains is the simplest compliance. Avoid sharp trace corners on high voltage nets; rounded corners reduce field concentration. Do not route high voltage traces under components where the clearance cannot be inspected, and keep them off the board edge where handling and mounting hardware reduce the effective isolation. Slots or milled cutouts in the board increase the creepage distance between domains dramatically and are the standard trick when space is tight; the arc must then travel around the slot. Conformal coating helps with contamination but does not replace spacing; treat it as a bonus, not a substitute.
Verification Beyond the DRC
The design rule checker verifies drawn geometry, not the real world. Review the finished layout visually for high voltage sections, checking that the spacing looks generous and that no via, mounting hole, or component lead encroaches on the clearance. Consider the assembled board: tall components can lean, screws and standoffs are conductive, and enclosures can press against the board, all reducing effective clearance. For production high voltage boards, hipot testing verifies the isolation physically; a board that passes DRC but fails hipot has a problem the rules did not catch, often contamination or a manufacturing defect. Spacing rules are the design intent; testing proves the intent survived manufacturing.
High voltage spacing is safety by distance: classify nets by voltage, set clearances for the peak with real margins, lay out with physical separation and rounded corners, and verify beyond the checker. The arc that never happens is the whole point.
Related Guides
- DRC Rules for High-Density Signal Escapes: High-density designs, fine-pitch parts, BGAs, dense connectors, live or die at the escape: the short, brutal routing problem of getting dozens or
- Via Tent Spacing Clearances in Complex Schematics: Via tenting, covering vias with solder mask so the annular ring and hole are sealed, protects against solder bridging, contamination, and accidental
- Teardrop Pad Reinforcement in Eagle Layouts: A teardrop is a small fillet of copper where a trace meets a pad, flaring the trace out to meet the pad's edge instead of joining it at a sharp neck
- Trace Creepage and Clearance DRC Setup in Eagle: Creepage and clearance are the two distances that keep high voltage where it belongs on a PCB. Clearance is the shortest distance through air between