Via tenting, covering vias with solder mask so the annular ring and hole are sealed, protects against solder bridging, contamination, and accidental shorting during assembly and service. In complex schematics that become dense boards, tenting decisions interact with spacing clearances: how close vias can sit to each other, to pads, and to board features while still tenting reliably. Get the clearances wrong and the mask fails to tent, leaving exposed vias that wick solder or trap flux; get them right and the board assembles cleanly and survives handling.
What Tenting Requires From the Layout
For solder mask to tent a via, the mask must bridge the via's hole: the liquid mask spans the opening and cures into a continuous film. This works reliably on small vias, where the hole is narrow enough for surface tension to hold the mask across it. Large vias defeat tenting; the mask sags into or through the hole, leaving it partially or fully open. The via's finished hole size is therefore the first clearance variable: keep tented vias small, and reserve untented (open) vias for the large ones that need to stay accessible.
The annular ring matters too. Tenting covers the ring as well as the hole, which means the mask's adhesion area around the via must be sufficient; a via jammed against a pad or another feature may lack the surrounding mask land needed for a reliable tent. Clearance around the via is not just electrical; it is mechanical, giving the mask something to grip.
Via-to-Via Spacing for Reliable Tenting
When vias sit close together, the solder mask between them becomes a thin web. If the web is too narrow, it lifts, cracks, or fails to adhere, and the tenting on both vias is compromised. The minimum via-to-via spacing for reliable tenting follows the fabricator's solder mask web tolerance: the mask needs a minimum width of adhered material between features to survive processing. Below that width, specify the vias as untented or accept the risk of mask failure.
In dense areas like BGA fanouts or connector breakouts, where via spacing is driven by the component's pitch, tenting may simply not be achievable at the required density. The design choice then becomes explicit: open vias with their assembly implications, or a less dense fanout that permits tenting. Make the choice deliberately rather than discovering it in the assembled boards.
Via-to-Pad and Via-to-Trace Clearances
Vias near SMD pads create the classic tenting conflict: the mask must tent the via while leaving the pad's solderable area fully open, and the web between them must survive. Tight via-in-pad or near-pad designs often specify the via as filled and capped (a different, more expensive process) precisely because tenting cannot serve both the via and the adjacent pad at fine pitches. Know where tenting stops being the answer.
- Check the fabricator's minimum solder mask web width; design all via spacings above it.
- Keep tented vias clear of board edges and cutouts, where mask adhesion is weakest.
- Verify tenting in the Gerber review; the mask layer shows exactly what will be covered.
- Specify tenting explicitly in the fabrication notes; do not assume it is the default.
Schematic Complexity and Layout Discipline
Complex schematics generate dense layouts, and dense layouts tempt via crowding. The discipline is to establish via and tenting rules early, as design constraints alongside the electrical rules: minimum via size for tenting, minimum via-to-via spacing, minimum via-to-pad clearance. Enter these as DRC rules in the layout tool so violations flag during routing, not during fabrication review.
Partition the schematic with layout in mind: grouping related circuitry keeps its vias and routing local, reducing the via density in any one area and giving tenting the clearances it needs. A schematic drawn for readability often lays out more cleanly than one drawn for compactness, because readable grouping mirrors physical grouping.
When to Specify Alternatives
Where tenting cannot meet the density, the alternatives are untented vias (acceptable when the assembly process tolerates exposed vias, as with careful hand soldering), plugged vias (filled with mask or epoxy, more reliable than tenting for larger holes), and filled-and-capped vias (the premium option for via-in-pad). Each has cost and capability implications; the schematic's complexity does not mandate the premium option everywhere, only where the clearances demand it.
Match the via treatment to the local requirements: tent the ordinary vias where clearances allow, plug or fill only the ones that need it. Blanket specifications waste money; targeted ones solve the actual problems.
Size vias for tenting, space them for the mask web, enforce the rules in DRC, and specify alternatives only where density defeats the tent. The solder mask is a thin film doing structural work; give it the clearances it needs and it will protect every via you ask it to.
Related Guides
- Net Class Spacing Rules for High Voltage Traces: High voltage on a PCB demands physical distance: traces at different potentials must be spaced far enough apart that the voltage cannot arc across
- DRC Rules for High-Density Signal Escapes: High-density designs, fine-pitch parts, BGAs, dense connectors, live or die at the escape: the short, brutal routing problem of getting dozens or
- Teardrop Pad Reinforcement in Eagle Layouts: A teardrop is a small fillet of copper where a trace meets a pad, flaring the trace out to meet the pad's edge instead of joining it at a sharp neck
- Trace Creepage and Clearance DRC Setup in Eagle: Creepage and clearance are the two distances that keep high voltage where it belongs on a PCB. Clearance is the shortest distance through air between