A copper pour turns empty board area into a ground plane, which lowers impedance, improves EMC, and simplifies return paths. But a pour placed with default clearances can create more problems than it solves: isolated copper islands that act as antennas, thermal reliefs that starve joints of heat or flood them with it, and clearances too tight for the fab to etch reliably. Getting pour clearance right in KiCad is a small skill with outsized impact on board quality.
What the pour clearance actually controls
In KiCad, the clearance setting on a copper zone defines the gap between the poured copper and everything it does not connect to: traces, pads, vias, and board edges. This gap exists for manufacturability and electrical safety. Too small and the fabricator's etching tolerances risk bridging; too large and you waste plane area and create long detours in return currents.
A sensible starting point is the board's general copper-to-copper clearance, often around 0.2 to 0.25 millimeters for standard processes, applied consistently. The pour should respect net-class clearances too: a high-voltage net passing near the ground pour needs a larger keepout than the default, which you enforce with a dedicated rule or a keepout zone rather than by eyeballing it. Solid fill is the default and the right choice for ground planes; hatched fills are a specialty for flex boards and RF structures, not something to reach for on a standard rigid board.
Islands, slivers, and stitching
The classic pour failure is the isolated island: a patch of copper completely surrounded by clearance, connected to nothing. It floats electrically, couples noise, and can resonate. KiCad can remove isolated islands automatically: in the zone properties, set "Remove islands" to Always, or to a minimum area threshold if you have deliberate copper features worth keeping. After pouring, visually scan the board for copper regions that connect to the net only through a hairline sliver, and either widen the connection or remove the region.
Stitching vias tie the pour together across layers and around obstacles, keeping the plane at one potential and giving return currents short paths. Place them generously around the board perimeter and near high-speed or high-current devices. A ground plane broken into peninsulas by routed traces behaves like several small planes; stitching and thoughtful routing keep it whole.
Resist the urge to split the ground plane into analog and digital regions unless you have a measured noise problem. A split forces return currents to detour around the moat, which is a classic self-inflicted EMC wound. If you must split, join the regions at exactly one point and route no signals across the gap.
Thermal reliefs versus solid connections
Thermal reliefs, the spoke pattern connecting pads to the pour, exist so soldering heat does not vanish into the plane before the joint forms. On small signal pads, reliefs are usually correct and KiCad applies them by default. On high-current connections, reliefs become a liability: the thin spokes add resistance and can overheat. For power nets, use solid connections to the pour and accept the harder soldering, or use reliefs with wider, more numerous spokes.
KiCad lets you set thermal relief spoke width and count per zone or per footprint. Match the relief to the joint: fine-pitch small pads get standard reliefs, large power pads and mounting holes get solid or heavy-spoke connections. Vias stitching into the plane are a different story: nobody solders a via, so give them solid connections and skip the reliefs. Review the actual spoke geometry on the board, not just the setting name, since defaults vary.
Pour priority and overlapping zones
When zones overlap, KiCad resolves them by priority. Set explicit priorities so power pours claim their regions before the ground pour fills the remainder; otherwise the ground zone may steal area meant for a power island, or two zones may fight over the same space with unpredictable clearance. A common scheme is power zones at higher priority, ground at the lowest, filling everything left.
Keepout zones are the scalpel for special cases: keep the pour away from board edges where handling or mounting hardware needs bare substrate, away from high-voltage sections, and away from antennas or sensitive analog regions where a ground plane would detune or couple. Draw keepouts deliberately rather than nudging clearances globally. Zone tooling has moved between KiCad versions; recent releases gather zone properties and priorities into a dedicated Zone Manager. The dialogs move, the concepts do not: priorities, clearances, and refills work the same way underneath.
Checking the finished pour
After the final pour, run DRC, then inspect visually. Learn what a pour failure looks like in the report: unconnected items, isolated copper, clearance violations, copper slivers, and connections narrower than the configured minimum each point at a specific fix. Look for islands, slivers, and unintended connections where the pour crept too close. Check that mounting holes have the intended connection or isolation, and that the pour does not short to any net through a misconfigured pad. A quick continuity review of the Gerber output, or KiCad's own DRC with copper checks enabled, catches the errors that eyes miss.
Refill zones after any layout change. KiCad does not always auto-update pours when you move traces, and routing against a stale pour produces phantom violations or, worse, phantom connections. Make zone refill part of your edit habit: move copper, refill, re-check.
Small skill, outsized impact
Copper pours are simple in concept and fiddly in execution. Set clearance from the fab's real numbers, kill islands, match thermal reliefs to the joint, prioritize overlapping zones explicitly, and verify the final result. Done right, the ground plane disappears into the background and just works, which is exactly what a plane should do.
Related Guides
- Ground Plane Stitching Via Spacing in KiCad Layouts: Stitching vias tie the ground planes of a multilayer board together into a single low-impedance reference, and their spacing decides how well that single reference holds together at frequency. This guide covers the spacing rules that matter.
- Differential Pair Length Matching in KiCad PCB: Differential pairs carry high-speed signals as equal-and-opposite voltages on two traces, and the receiver reads the difference between them. This guide walks through the length-matching tools in KiCad and the tolerances worth chasing.
- Zone Priority Rules for Overlapping KiCad Fills: KiCad's copper zones, the poured fills for grounds, power, and signals, overlap constantly in real designs: a ground pour covering the board with a power island nested inside. This guide explains how priority numbers resolve the overlap.
- Thermal Relief Spoke Angles on Fine Pitch Pads: A pad connected directly to a large copper pour acts as a heatsink during soldering: the pour wicks heat away and the joint never flows properly. This guide tunes spoke angle and width for pads where every tenth of a millimeter counts.