Stitching vias tie the ground planes of a multilayer board together into a single low-impedance reference, and their spacing decides how well that works at the frequencies the board actually carries. Too sparse and the planes behave as separate sheets with resonances between them; too dense and you waste layout effort and drill hits for no measurable gain. The right spacing follows from the highest frequency on the board, and KiCad gives you the tools to place stitching systematically rather than by guesswork.
What stitching vias accomplish
A multilayer board typically has ground on more than one layer, and those ground regions must act as one conductor. Without stitching, return currents crossing between layers have to find their own way, often taking long detours that create loop antennas and radiate noise. Stitching vias provide frequent, low-inductance connections between the planes, so return currents always have a nearby path and the planes stay at the same potential everywhere.
Stitching also suppresses cavity resonances: the parallel ground planes form a resonant cavity, and energy at the resonant frequencies builds up between the planes and radiates from the board edges. Vias placed around the board perimeter and across large plane areas break up these resonances by shorting the planes together at intervals much smaller than the resonant wavelength.
Spacing from the highest frequency
The rule of thumb ties via spacing to wavelength: space stitching vias at no more than about one-twentieth of the wavelength of the highest significant frequency on the board. For a board carrying 100 MHz signals, the wavelength in the PCB dielectric is roughly a meter and a half, so twentieth-wavelength spacing lands around several centimeters, which is easy. For a board with 2.4 GHz Wi-Fi, the wavelength is roughly six centimeters, and twentieth-wavelength spacing means vias every few millimeters around critical areas.
In practice, few boards need twentieth-wavelength stitching everywhere. Apply the tight spacing around high-frequency sections, the radio, fast digital buses, switching converters, and use more relaxed spacing across quiet regions of the board. The goal is to suppress the resonances that the board's actual signals can excite, not to tile the board in vias for its own sake.
Placement strategy in KiCad
Start with the perimeter: a row of stitching vias around the board edge, spaced according to the rule above, forms the first line of defense against edge radiation and plane resonance. Then stitch around the high-frequency sections, ringing each noisy or sensitive area with vias that tie the planes together locally. Finally, fill large uninterrupted plane areas with a grid of stitching vias so no large region floats unconnected.
KiCad's array and copy tools make this efficient: place one via, then use the array function to replicate it along an edge or across a region. Assign the vias to the ground net so the DRC understands them, and verify with the 3D viewer or a Gerber review that the stitching lands where intended and does not collide with components or break plane continuity with excessive antipads.
Via construction details
Use small vias for stitching: they cost less board area, add less inductance than large ones would suggest is needed, and place easily in tight spots. The via's inductance, not its current capacity, is what matters here, since stitching vias carry brief return-current transients rather than DC load. Multiple small vias beat one large via for high-frequency stitching because the parallel combination has lower inductance.
Keep the via barrels clear of signal traces on inner layers. A stitching via that pierces a high-speed signal's reference plane creates a discontinuity in that plane; route around stitching fields or accept the minor disruption in non-critical areas. Around sensitive signals, coordinate the stitching with the signal's own return vias so the reference stays continuous.
Verifying the result
Review the finished layout for plane continuity: large ground regions with no stitching, peninsulas of copper connected by a single narrow bridge, and isolated islands are all defects the spacing rule is meant to prevent. KiCad's DRC will flag unconnected copper, but it will not flag a plane that is technically connected yet stitched too sparsely for its frequencies; that judgment remains the designer's.
Space from the wavelength, stitch the perimeter first, ring the noisy sections, fill the quiet expanses, and review for continuity. Well-stitched planes are invisible in a working product, which is exactly the point.
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